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Intel’s Leap with High-NA EUV Technology Marks a New Era in Chip Manufacturing
Nearly a year ago, Intel unveiled a significant milestone in its manufacturing journey by showcasing the receipt of its $400 million High-NA EUV lithography machines from ASML. This second-generation technology is an evolution of the earlier extreme ultraviolet (EUV) machines, which have become critical in the fabrication of chips with process nodes smaller than 7nm. Lithography machines play a vital role in imprinting intricate circuitry patterns onto silicon wafers, the fundamental building blocks of semiconductor production.
The new High-NA EUV machines, exclusive to ASML, represent a technological advancement with a notable increase in numerical aperture from .33 to .55. This enhancement allows for sharper imaging and the ability to print finer features on silicon wafers, enabling manufacturers to create chips using process nodes below 3nm.
Efficiency Gains with High-NA EUV Technology
Smaller process nodes often employ reduced transistor sizes, permitting a greater number of these essential components to fit within a given area of an integrated circuit. This increase in transistor density contributes to improved chip performance and energy efficiency. The advanced High-NA EUV machines significantly cut down the number of exposures needed to transfer designs onto silicon wafers. Tasks that previously required three exposures and around 40 processing steps can now be accomplished with just one exposure and a minimal number of processing actions, translating to substantial savings in both time and costs.
Intel recently announced at a conference in San Jose, California, that both of its High-NA machines are now in production, actively contributing to the chip manufacturing process. Company representatives highlighted that these new machines exhibit approximately double the reliability of their predecessors. According to Steve Carson, a senior principal engineer at Intel, the company has achieved the production of 30,000 wafers, noting that the consistency of output is a significant advantage for the overall platform.
Intel Foundry Services (IFS) aims to reclaim its standing in process leadership against competitors like TSMC and Samsung Foundry. Its upcoming A18 node, expected to enter mass production in the latter part of this year, is parallel to TSMC and Samsung’s upcoming 2nm node, also slated for mass production in 2025. Intel enjoys a temporary advantage as it will be the sole foundry utilizing its unique Backside Power Delivery (BSPD) feature, termed Power Via, before the competition implements similar technologies.
A Journey of Regaining Competitive Edge
This innovative feature relocates power wiring to the back of the chips, facilitating more effective power delivery to transistors, which allows for higher operational speeds. TSMC, however, has plans to integrate Backside Power Delivery into its forthcoming 2nm node (N2P), set to go into mass production next year.
The path to reclaiming leadership in semiconductor manufacturing has been fraught for Intel. The company faced a lengthy seven-year delay in adopting EUV lithography, which enabled TSMC and Samsung to surpass its technological capabilities. Intel also experienced challenges in producing 10nm chips, largely due to a reliance on older lithography technology. The swift acquisition of High-NA EUV machines underscores Intel’s determination not to repeat past mistakes.
The High-NA EUV lithography machines will primarily facilitate the production of chips within Intel’s in-development 18A process node, specifically for a project codenamed Panther Lake, designed for notebook applications. The full potential of these machines will be further demonstrated as they are employed in the anticipated 14A node, although no production timeline has been announced as of yet.
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