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MediaTek is developing its flagship chipset for 2025, and initial reports suggest it will be a formidable contender in the market, as noted by Digital Chat Station. This upcoming chip will be manufactured using TSMC’s N3P process technology, contrasting with its predecessors, the Dimensity 9400 and 9400+, which utilize the N3E node. A notable aspect of this new chipset is its architecture that incorporates only large CPU cores, along with a significantly enhanced neural processing unit (NPU).
Details from the leak indicate that the Dimensity 9500 will comprise the following CPU configuration: 1x Travis core, 3x Alto cores, and 4x Gelas cores. While the specifics of the Alto core remain unclear, Travis and Gelas correspond to the forthcoming Cortex-X and Cortex-A7xx series from ARM, as highlighted in a roadmap by WikiChip:
Unofficial roadmap of ARM Cortex designs (image source)
Although Alto is not categorized as a small core, it is anticipated that it is a variation of the updated Cortex-A5xx since Nevis represents the latest in that line. Additionally, it is rumored that the Travis core may potentially achieve clock speeds exceeding 4GHz.
The chipset will also integrate 16MB of L3 cache alongside 10MB of system-level cache. In terms of memory support, it will be compatible with LPDDR5X RAM, capable of speeds up to 10,667 Mbps, and will feature a 4-lane UFS 4.1 interface.
On the graphics side, an Immortalis-Dire GPU is expected, promising enhanced ray tracing capabilities and optimized power consumption.
The processing power for artificial intelligence tasks will see a boost with the introduction of NPU 9.0, which is projected to reach 100 TOPS in performance. While there are currently no official metrics for the Dimensity 9400, some estimates suggest it may achieve around 50 TOPS, although there are indications of even higher performance levels.
In addition, Digital Chat Station hinted at the imminent release of the Dimensity 8450. As for the Dimensity 9500, it is likely to be unveiled around October or November.
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