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TSMC Disposing of Silicon Wafers in Garbage Bins Near Fabs Not Classified as “Chip Binning”

Photo credit: www.phonearena.com

The Intricacies of Chip Binning and the Discovery of a Test Silicon Wafer

In the world of semiconductor manufacturing, after the production of a chip, a rigorous testing process is crucial. This evaluation assesses various performance metrics including clock speed, power consumption, and operational cores. Depending on these test results, chips are categorized into performance bins: high-performing chips are placed in premium bins and marketed as top-tier products, while those that fall short are relegated to lower bins with reduced prices. For instance, a chip with a single defective core may be marketed as a seven-core processor rather than the full eight.

This classification system, known as “Chip Binning,” plays a vital role in determining the marketability of semiconductor products. Interestingly, a recent incident contributed an unusual twist to this practice. A Reddit user stumbled upon a silicon wafer discarded in a dumpster near TSMC’s Fab 16 in Nanjing, China. While this facility does not produce cutting-edge chips with advanced nodes like 4nm or even 2nm, it primarily focuses on manufacturing chips using more mature process nodes such as 12nm, 16nm, and 28nm.

The wafer discovered by the Redditor, who goes by the handle AVX512-VNNI, cannot be utilized for producing GPU chips for companies like OpenAI, which has recently reported a shortage of such components. This limitation arises from the fact that the wafer in question is a test wafer with dummy circuitry designed for validating the lithography machines employed in the chip-making process. However, each silicon wafer can theoretically contain hundreds of chip dies, making their value in production quite substantial.

Following the discovery, fellow Reddit users showcased their creativity with suggestions ranging from displaying the wafer in a picture frame to honor its technological significance to humorous ideas about employing diamond-tipped pizza slicers to divide it into chips. However, given that the spacing between the chips on a wafer is merely 0.5mm, precision and expertise would be essential to handle such an endeavor correctly.

While much of the conversation around the wafer was light-hearted, it nonetheless highlights the remarkable journey of semiconductor manufacturing and the intricate processes that drive the technology behind the devices we use daily. Indeed, the artistic potential of showcasing such technological artifacts speaks to the appreciation many have for the advancements in the semiconductor industry.

Source
www.phonearena.com

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